Portapack-Carnage

◆ RCC_CFGR2_ADCPRE12_DIV256

#define RCC_CFGR2_ADCPRE12_DIV256   ((uint32_t)0x000001B0)

#include <firmware/chibios/os/hal/platforms/STM32F30x/stm32f30x.h>

ADC12 PLL clock divided by 256 ADCPRE34 configuration